Analog-to-digital (A/D) converters are electrical circuit devices that convert continuous signals, such as voltages or currents, from the analog domain to the digital domain, in which the signals are represented by numbers. A variety of A/D converter types exist, including flash A/Ds, sub-ranging A/Ds, successive approximation A/Ds, and integrating A/Ds. Another type is known as a sigma delta or delta sigma (e.g., Δ-Σ) A/D converter, which includes a delta sigma modulator that samples an analog signal at a very high sampling rate (oversampling) in order to perform a noise shaping function. The oversampling is commonly performed at a multiple of the Nyquist rate (FN) for a given input signal frequency content (e.g., sampling frequency FS is 10 to 1000 times FN), wherein quantization noise power is spread over a bandwidth equal to the sampling frequency, thereby reducing the noise density in the band of interest. Digital filtering is then employed on the digital output to achieve a high resolution. Decimation may then be employed to reduce the effective sampling rate back to the “Nyquist” rate. Delta sigma data converters also typically include a loop filter in the forward signal path that operates to push some of the quantization noise into the higher frequency spectrum beyond the band of interest.
Referring to FIG. 1, a typical delta sigma converter 10 include a loop filter 12, a single or multi-bit quantizer 14, and a digital-do-analog (D/A) feedback converter 16 in a closed loop forming a delta sigma modulator. The loop filter 12 may be first order, second order, or jth order (e.g., where j is a positive integer), and is generally an integrator circuit (e.g., low pass filter) that filters the difference between the analog input signal X(t) and a feedback signal from the D/A feedback converter 16. The quantizer 14 includes a sample and hold (S/H) circuit 18 and a comparator 20, which convert the filtered analog signal to a digital output Y(n), and the feedback D/A converter 16 converts the quantized digital output Y(n) to analog form, which is provided as the feedback signal to the filter 12. The quantized output Y(n) is oversampled, including a series of ones and zeros where the mean of all the data points Y(n) is representative of the analog input signal X(t). The output Y(n) is fed to a digital filter and decimation system 22 that reduces the bandwidth by averaging the samples Y(n) (e.g., low pass filter). Because the bandwidth is reduced by the digital output filter 22, the output data rate may be reduced below the original sampling rate FS through decimation (e.g., passing every mth result and discarding the rest), while still satisfying the Nyquist criterion.
In conventional active delta sigma converters, the filter 12 is typically constructed using switching components, such as switched capacitor circuits. However, many modern CMOS fabrication processes suffer from capacitor leakage that limits the performance of active delta sigma converters that have signal path switching components. Passive delta sigma converters have been proposed, in which the loop filter is constructed without switched capacitor circuits or amplifiers, such that leakage issues are avoided, even with modern CMOS fabrication processes. However, passive delta sigma converters are generally restricted to first or second order filters, wherein higher order filtering lengthens the loop delay, resulting in instability. In addition, the input referred noise of the comparator 20 in conventional passive delta sigma converters is not shaped by the filter 12, resulting in degraded performance. Thus, while passive delta sigma converters avoid leakage problems in certain modern CMOS fabrication processes, improved data conversion systems are needed by which the advantages of delta sigma modulation can be realized without sacrificing performance.